The present invention relates to an improved reply decoder of the digital delay line type for Pulse Code Modulation (PCM) decoder service in Air Traffic Control Radar Beacon Systems/Selective Identification Feature (ATCRBS/SIF) and in Traffic Alert and Collision Avoidance Systems (TCAS).
Considering the large number of ATCRBS/SIF interrogators in many metropolitan areas, the large number of aircraft that will carry interrogating TCAS equipment in the near future, and the typically large number of transponder-equipped aircraft that are within operational range of one or more of these interrogators, a large number of replies will be received by each interrogator station. Only those valid responses to a particular interrogation are of interest to the respective interrogator; other replies, known as False Replies Unsynchronized In Time (FRUIT), cause a major reply processing problem for the associated computer, and this problem becomes acute in high reply-density areas.
Hardware means are included in reply decoders, and software means in reply processors, to minimize such FRUIT interference; but these means can not be substantially effective when "garbled" replies exist, i.e., where two more more replies arrive at the interrogator receiver at approximately the same time. Detection and degarbling of overlapping replies is a second major problem of reply decoders Obviously, it is desirable to eliminate reply garbling without losing valid replies.
The reply format inherent in the ATCRBS/SIF reply modes include one leading and one trailing framing pulse, with said pulses being separated by 20.3 microseconds. Valid reply pulse trains are recognized by this spacing between framing pulses. Up to 13 data pulses, spaced at 1.45 us. intervals between the framing pulses, are synchronized for decoding based upon the time of the initial framing pulse. This function is accomplished in the reply decoder by a bracket decoder circuit on the digital delay line. In addition to these normal replies, an individual aircraft pilot may select special replies: e.g., the trailing framing pulse may be followed at 4.35 us. by a Special Position Identification (SPI) pulse in modes 2 and 3/A, or by three subsequent pairs of framing pulses (with each leading framing pulse 4.35 us. after the trailing framing pulse of the previous pair) to indicate a military emergency. Mode 1 SPI is indicated by a repeated pair of framing pulses with the first spaced 4.35 us., after the trailing framing pulse of the initial reply.
Under conditions of heavy reply rates, the probability becomes high that replies will be overlapped, interleaved, or closely spaced and in time alignment. Hardware means of deriving leading and trailing edges of reply pulses and then deducing the correct position of these reply pulses will reduce these effects because narrow pulses can more easily be separated.
Copending application Ser. No. 332,135, filed Apr. 3, 1989, titled "Leading Edge Detector/Pulse Quantizer" by N. Sanford, R. Yienger and B. J. Lyons describes an improved means for separating interfering reply messages into a pulse data stream containing only pulses 125 ns. in length, with each pulse separated by a minimum of 125 ns. and with the leading edge of each pulse positioned in the data stream according to the relative time of its reception at the interrogating station. The output data stream is termed "Sum Leading Edge (SLE)".
The described reply format gives rise to the third problem plaguing reply decoders and processors. "Phantom" replies appear in the reply decoder output whenever any two pulses arrive at the reply decoder with the same time separation between them (20.3 microseconds) as the two framing pulses of a valid reply. This problem can arise when two different aircraft each respond to the same interrogation signal at substantially the same time and two reply messages arrive at the interrogation station in overlapping relationship such that a data pulse contained in the first reply message and a data pulse contained in the second reply message are by fortuitous circumstance spaced apart 20.3 us.
Early beacon reply decoders usually operating on the unprocessed video output of the system receiver either declared all bracket-decoded replies which satisfied the bracket pair time-spacing criteria of 20.3 us., or else declared all nongarbled bracket decodes. The logic circuits for detecting garble either detected leading or trailing bracket decodes which were overlapped and in sufficiently close time proximity to make the code bits of the bracket pair under analysis questionable otherwise they simply looked for pulses in time aligned slots (multiples of 1.45 us.) either before or after the bracket pair. If the reply decoder had been set to declare all bracket decodes, it would tend to overload the associated computer, because two closely spaced replies, in combination, can generate as many as 13 bracket decodes of which two would be real but the remainder phantoms. Conversely, if only nongarbled replies were to be reported, then no replies would be reported in this situation.
U.S. Pat. No. 4,241,310, issued Dec. 23, 1980, titled "Delay Line Code Detector" by Leo A. Kerr describes a decoder for a pulse code communications system of the type here involved which utilizes a 100-us. digital delay line in conjunction with leading edge pulse detection, to allow detection of two closely spaced replies in time alignment. Phantoms produced between the pair of replies were discarded. The two replies would be declared as not garbled if not overlapped; otherwise they would be declared garbled.
The Kerr decoder also handles three closely spaced replies, invariably declaring the first and third replies as not garbled if they were not overlapped with the middle reply. It also declares the middle reply as not garbled if that reply was not overlapped with either the first or third replies and provided that data pulses were not incorporated in both leading and trailing phantom bracket decodes. If either condition existed, the reply would not be declared at all. This method represented a substantial improvement over earlier decoding methods in that, even in the garbled reply detection mode, it eliminated any possibility of phantom reply declaration.
The Kerr decoder had certain deficiencies. First, in elimination of phantom replies, it also eliminated middle replies of a group of three closely spaced and time-aligned replies where the center reply had data pulses present which created both leading and trailing phantom bracket decodes.
A second deficiency of the Kerr decoder was that, in the event of three overlapped replies which are also in time alignment, it would invariably declare the first and third replies as nongarbled, even though they were likely to be garbled and does not declare the middle reply.
An improved version of the referenced Kerr decoder developed for the TCAS program is described in a report titled "Simulation of Enhanced TCAS-II Signal Processor Hardware Design", pp. 2-17 through 2-35; J. Lyons and M. Martin, authors; Report No. BCD-TR-092, dated Feb. 29, 1984; prepared and available to the public through National Technical Information Service, Springfield, VA 22161.
The TCAS decoder also employs a 100-us. digital delay line, but with improved combinational logic which processes closely spaced time-aligned reply situations more accurately.
Both the Kerr decoder and the TCAS decoder were designed for civil aviation use. To provide for military emergency decoding, shift registers would have to be extended an additional 33.3 us. to allow time for decoding the three trailing bracket decodes which comprise a military emergency reply. At the 8.276 MHz clock rate used in the TCAS decoder, more than 840 flip-flop elements are needed for normal replies. With an additional 280 flip-flop needed to decode and validate military emergency replies, these implementations would require a total of more than 1100 elements in their shift registers. Further, both implementations used parallel combinational logic operating from one-fourth of the stages distributed across the whole shift register, so that formidable amounts of combinational logic and interconnection would be required for military applications.